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Message-Id: <1460743138-17768-1-git-send-email-yamada.masahiro@socionext.com>
Date: Sat, 16 Apr 2016 02:58:58 +0900
From: Masahiro Yamada <yamada.masahiro@...ionext.com>
To: arm@...nel.org
Cc: Masahiro Yamada <yamada.masahiro@...ionext.com>,
devicetree@...r.kernel.org, Kumar Gala <galak@...eaurora.org>,
linux-kernel@...r.kernel.org,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Will Deacon <will.deacon@....com>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH] arm64: dts: uniphier: add /memreserve/ for spin-table release address
As Documentation/arm64/booting.txt says, the cpu-release-addr
location should be reserved.
Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 651c9d9..90909d2 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -42,6 +42,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+/memreserve/ 0x80000100 0x00000008;
+
/ {
compatible = "socionext,ph1-ld20";
#address-cells = <2>;
--
1.9.1
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