lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20160416094059.44d6a6aa@bbrezillon>
Date:	Sat, 16 Apr 2016 09:40:59 +0200
From:	Boris Brezillon <boris.brezillon@...e-electrons.com>
To:	Rafał Miłecki <zajec5@...il.com>
Cc:	linux-mtd@...ts.infradead.org, Wenyou Yang <wenyou.yang@...el.com>,
	Josh Wu <rainyfeeling@...look.com>,
	Richard Weinberger <richard@....at>,
	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	linux-kernel@...r.kernel.org (open list)
Subject: Re: [PATCH 04/12] mtd: nand: atmel: set ECC algorithm explicitly

On Fri, 15 Apr 2016 21:54:04 +0200
Rafał Miłecki <zajec5@...il.com> wrote:

> Set it to value obtained from platform data with fallback to Hamming.
> This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
> enum nand_ecc_algo).
> 
> Signed-off-by: Rafał Miłecki <zajec5@...il.com>
> ---
>  drivers/mtd/nand/atmel_nand.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index eec8ca7..6aa82e4 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1212,6 +1212,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
>  		dev_warn(host->dev,
>  			"Can't get I/O resource regs for PMECC controller, rolling back on software ECC\n");
>  		nand_chip->ecc.mode = NAND_ECC_SOFT;
> +		nand_chip->ecc.algo = NAND_ECC_HAMMING;
>  		return 0;
>  	}
>  
> @@ -1295,6 +1296,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
>  		/* page size not handled by HW ECC */
>  		/* switching back to soft ECC */
>  		nand_chip->ecc.mode = NAND_ECC_SOFT;
> +		nand_chip->ecc.algo = NAND_ECC_HAMMING;
>  		return 0;
>  	}
>  
> @@ -1613,6 +1615,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host,
>  	 * even if the nand-ecc-mode property is not defined.
>  	 */
>  	host->nand_chip.ecc.mode = NAND_ECC_SOFT;
> +	host->nand_chip.ecc.algo = NAND_ECC_HAMMING;
>  
>  	return 0;
>  }
> @@ -1629,6 +1632,7 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev,
>  		dev_err(host->dev,
>  			"Can't get I/O resource regs, use software ECC\n");
>  		nand_chip->ecc.mode = NAND_ECC_SOFT;
> +		nand_chip->ecc.algo = NAND_ECC_HAMMING;
>  		return 0;
>  	}
>  
> @@ -1661,6 +1665,7 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev,
>  		/* page size not handled by HW ECC */
>  		/* switching back to soft ECC */
>  		nand_chip->ecc.mode = NAND_ECC_SOFT;
> +		nand_chip->ecc.algo = NAND_ECC_HAMMING;
>  		return 0;
>  	}
>  
> @@ -2159,6 +2164,7 @@ static int atmel_nand_probe(struct platform_device *pdev)
>  		memcpy(&host->board, dev_get_platdata(&pdev->dev),
>  		       sizeof(struct atmel_nand_data));
>  		nand_chip->ecc.mode = host->board.ecc_mode;
> +		nand_chip->ecc.algo = host->board.ecc_algo;

If you follow my suggestion on patch 3, it should be:

		if (host->board.ecc_mode == NAND_ECC_SOFT)
			nand_chip->ecc.algo = NAND_ECC_HAMMING;

This way we avoid any dependency between the avr32 and nand tree.

>  
>  		/* 16-bit bus width */
>  		if (host->board.bus_width_16)



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ