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Date:	Sat, 16 Apr 2016 21:43:24 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	linuxppc-dev@...ts.ozlabs.org
Cc:	Pan Xinhui <xinhui@...ux.vnet.ibm.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Boqun Feng <boqun.feng@...il.com>,
	linux-kernel@...r.kernel.org, Paul Mackerras <paulus@...ba.org>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH] powerpc: introduce {cmp}xchg for u8 and u16

On Wednesday 13 April 2016 19:15:17 Pan Xinhui wrote:
> Hello Peter,
> 
> On 2016年04月12日 22:30, Peter Zijlstra wrote:
> > On Sun, Apr 10, 2016 at 10:17:28PM +0800, Pan Xinhui wrote:
> >>
> >> On 2016年04月08日 15:47, Peter Zijlstra wrote:
> >>> On Fri, Apr 08, 2016 at 02:41:46PM +0800, Pan Xinhui wrote:
> >>>> From: pan xinhui <xinhui.pan@...ux.vnet.ibm.com>
> >>>>
> >>>> Implement xchg{u8,u16}{local,relaxed}, and
> >>>> cmpxchg{u8,u16}{,local,acquire,relaxed}.
> >>>>
> >>>> Atomic operation on 8-bit and 16-bit data type is supported from power7
> >>>
> >>> And yes I see nothing P7 specific here, this implementation is for
> >>> everything PPC64 afaict, no?
> >>>
> >> Hello Peter,
> >> 	No, it's not for every ppc. So yes, I need add #ifdef here. Thanks for pointing it out.
> >> We might need a new config option and let it depend on POWER7/POWER8_CPU or even POWER9...
> > 
> > Right, I'm not sure if PPC has alternatives, but you could of course
> > runtime patch the code from emulated with 32bit ll/sc to native 8/16bit
> > ll/sc if present on the current CPU if you have infrastructure for these
> > things.
> > 
> seems interesting. I have no idea about how to runtime patch the code. I will try to learn that.
> If so, we need change {cmp}xchg into uninline functions?

I think you don't need to, see do_feature_fixups()/patch_feature_section()

Note that an #ifdef by itself has to worry about any combination of
architectures, so in a kernel that has both POWER6 and POWER7 enabled,
you cannot call the POWER7-only function.

	Arnd

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