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Message-Id: <1461049006-22818-1-git-send-email-zajec5@gmail.com>
Date:	Tue, 19 Apr 2016 08:56:46 +0200
From:	Rafał Miłecki <zajec5@...il.com>
To:	Florian Fainelli <f.fainelli@...il.com>
Cc:	Rafał Miłecki <zajec5@...il.com>,
	Hauke Mehrtens <hauke@...ke-m.de>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	linux-arm-kernel@...ts.infradead.org (open list:BROADCOM BCM5301X ARM
	ARCHITECTURE),
	devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
	DEVICE TREE BINDINGS), linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] ARM: BCM5301X: Add DT entry for SPI controller and NOR flash

Controller is present on every BCM4708* board but only few devices have
serial flash attached so mark it as disabled by default.

Signed-off-by: Rafał Miłecki <zajec5@...il.com>
---
 arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts  |  4 ++++
 arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts |  4 ++++
 arch/arm/boot/dts/bcm5301x.dtsi               | 14 ++++++++++++++
 3 files changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
index c973f768..1c7e53d 100644
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -59,3 +59,7 @@
 &uart0 {
 	status = "okay";
 };
+
+&spi_nor {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
index 4d610ff..8b0c440 100644
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -122,3 +122,7 @@
 &uart0 {
 	status = "okay";
 };
+
+&spi_nor {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 9c06d91..7d4d29b 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -225,6 +225,20 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 		};
+
+		spi@...00 {
+			reg = <0x00029000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			spi_nor: spi-nor@0 {
+				compatible = "jedec,spi-nor";
+				reg = <0>;
+				spi-max-frequency = <20000000>;
+				linux,part-probe = "ofpart", "bcm47xxpart";
+				status = "disabled";
+			};
+		};
 	};
 
 	lcpll0: lcpll0@...0c100 {
-- 
1.8.4.5

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