linux-kernel - Re: [PATCH v2] PCI: Designware: remove wrong RC memory base/limit configuration

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Message-ID: <CAHM4w1neBhNUeA5MDRzt1sgdczWnX1r7GF1o18sBEVuG50tgeg@mail.gmail.com>
Date:	Tue, 19 Apr 2016 16:57:05 +0530
From:	Pratyush Anand <pratyush.anand@...il.com>
To:	Gabriele Paoloni <gabriele.paoloni@...wei.com>
Cc:	Jingoo Han <jingoohan1@...il.com>, linuxarm@...wei.com,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	linux-kernel@...r.kernel.org, Bjorn Helgaas <helgaas@...nel.org>
Subject: Re: [PATCH v2] PCI: Designware: remove wrong RC memory base/limit configuration

On Sat, Apr 16, 2016 at 4:33 PM, Gabriele Paoloni
<gabriele.paoloni@...wei.com> wrote:
>
> Currently dw_pcie_setup_rc configures memory base and memory
> limit in the type1 configuration header for the root complex.
> In doing so it uses the cpu address (pp->mem_base) rather than
> the bus address (pp->mem_bus_addr): this is wrong and it is
> useless since the configuration is overwritten later on when
> pci_bus_assign_resources() is called.
>
> Therefore this patch just removes this configuration from
> dw_pcie_setup_rc.
>
> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@...wei.com>

Acked-by: Pratyush Anand <pratyush.anand@...il.com>