linux-kernel - [PATCH] x86/vdso: Use RDPID in preference to LSL when available

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Message-Id: <2add81c53506940804b0957bc9d850c26f72ac56.1461105921.git.luto@kernel.org>
Date:	Tue, 19 Apr 2016 15:47:39 -0700
From:	Andy Lutomirski <luto@...nel.org>
To:	x86@...nel.org
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Borislav Petkov <bp@...en8.de>,
	Andy Lutomirski <luto@...nel.org>
Subject: [PATCH] x86/vdso: Use RDPID in preference to LSL when available

RDPID is a new instruction that reads MSR_TSC_AUX quickly.  This
should be considerably faster than reading the GDT.  Add a
cpufeature for it and use it from __vdso_getcpu when available.

Signed-off-by: Andy Lutomirski <luto@...nel.org>
---

I don't have a Cannonlake CPU (or whatever CPU I'd need for this).
Could someone who has such a beast give this a try?

Boris, could you double-check me?  You're a lot more familiar with
CPUID stuff and the instruction tables than I am, and I can't fall
back to a real disassembler because the instruction is too new.

Also, it's time for someone to do UMIP.  I'll see if I can convince
someone in KVM land to emulate it to make it easier to test.

arch/x86/include/asm/cpufeatures.h   | 1 +
 arch/x86/include/asm/special_insns.h | 8 ++++++++
 arch/x86/include/asm/vgtod.h         | 7 ++++++-
 3 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 7bfb6b70c745..beaf2fb601ee 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -279,6 +279,7 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
 #define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */
 #define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */
+#define X86_FEATURE_RDPID	(16*32+ 22) /* RDPID instruction */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index d96d04377765..de64c404dc74 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -301,6 +301,14 @@ static inline void pcommit_sfence(void)
 
 #define nop() asm volatile ("nop")
 
+/* Read MSR_TSC_AUX using RDPID. */
+static inline unsigned int rdpid(void)
+{
+	unsigned int pid;
+
+	asm (".byte 0xf3,0x0f,0xc7,0xf8" : "=a" (pid));  /* RDPID %eax/rax */
+	return pid;
+}
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index e728699db774..3a01996db58f 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -89,8 +89,13 @@ static inline unsigned int __getcpu(void)
 	 * works on all CPUs.  This is volatile so that it orders
 	 * correctly wrt barrier() and to keep gcc from cleverly
 	 * hoisting it out of the calling function.
+	 *
+	 * If RDPID is available, use it.
 	 */
-	asm volatile ("lsl %1,%0" : "=r" (p) : "r" (__PER_CPU_SEG));
+	alternative_io ("lsl %[p],%[seg]",
+			".byte 0xf3,0x0f,0xc7,0xf8", /* RDPID %eax/rax */
+			X86_FEATURE_RDPID,
+			[p] "=a" (p), [seg] "r" (__PER_CPU_SEG));
 
 	return p;
 }
-- 
2.5.5