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Date: Tue, 19 Apr 2016 18:53:54 -0500 From: Bjorn Helgaas <helgaas@...nel.org> To: Alex Williamson <alex.williamson@...hat.com> Cc: linux-pci@...r.kernel.org, bhelgaas@...gle.com, linux-kernel@...r.kernel.org Subject: Re: [PATCH 0/2] PCI: Skylake PCH ACS quirks On Thu, Mar 31, 2016 at 04:34:26PM -0600, Alex Williamson wrote: > Intel Skylake systems attempted to implement ACS on the PCH root > ports, but it came out a wee bit off. As noted in the second patch > and the datasheets from Intel, dwords were used for the ACS > capability and control words, so we see the capabilities correctly > but the control register is an extra 2 bytes offset. With this > quirk we can fix the kernel, unfortunately lspci will still show > the wrong ACS control bits though. Thanks, > > Alex > > --- > > Alex Williamson (2): > PCI: Reverse standard ACS vs device specific ACS enabling > PCI: Quirk PCH root port ACS for Sunrise Point Wow, hard to imagine how that got through validation. Applied to pci/virtualization for v4.7, thanks, Alex!
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