lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5718FB80.90205@arm.com>
Date:	Thu, 21 Apr 2016 17:10:40 +0100
From:	Suzuki K Poulose <Suzuki.Poulose@....com>
To:	Mathieu Poirier <mathieu.poirier@...aro.org>,
	linux-arm-kernel@...ts.infradead.org
Cc:	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 14/15] coresight: tmc: implementing TMC-ETR AUX space
 API

On 12/04/16 18:54, Mathieu Poirier wrote:
> This patch implement the AUX area interfaces required to
> use the TMC (configured as an ETR) from the Perf sub-system.
>
> The heuristic is heavily borrowed from the ETB10 and TMC-ETF
> implementation.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@...aro.org>

> +static void tmc_update_etr_buffer(struct coresight_device *csdev,
> +				  struct perf_output_handle *handle,
> +				  void *sink_config)
> +{
> +	struct cs_etr_buffers *buf = sink_config;
> +
> +	/*
> +	 * An ETR configured to work in contiguous memory mode works the same
> +	 * was as an ETB or ETF.
> +	 */
> +	tmc_update_etf_buffer(csdev, handle, &buf->tmc);

Really ? I thought the ETR stores the data to the allocated System RAM and can
be read directly from the memory than using the RRD ?

Suzuki



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ