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Date:	Fri, 22 Apr 2016 16:32:22 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Will Deacon <will.deacon@....com>
Cc:	linux-kernel@...r.kernel.org,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
Subject: Re: [PATCH] documentation: ACQUIRE applies to loads, RELEASE applies
 to stores

On Fri, Apr 22, 2016 at 11:41:49AM +0100, Will Deacon wrote:
> For compound atomics performing both a load and a store operation, make
> it clear that _acquire and _release variants refer only to the load and
> store portions of compound atomic. For example, xchg_acquire is an xchg
> operation where the load takes on ACQUIRE semantics.
> 
> Cc: Paul E. McKenney <paulmck@...ux.vnet.ibm.com>

Thanks!

Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>

> Signed-off-by: Will Deacon <will.deacon@....com>
> ---
>  Documentation/memory-barriers.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
> index 3729cbe60e41..05f8011011be 100644
> --- a/Documentation/memory-barriers.txt
> +++ b/Documentation/memory-barriers.txt
> @@ -464,6 +464,11 @@ And a couple of implicit varieties:
>       This means that ACQUIRE acts as a minimal "acquire" operation and
>       RELEASE acts as a minimal "release" operation.
>  
> +A subset of the atomic operations described in atomic_ops.txt have ACQUIRE
> +and RELEASE variants in addition to fully-ordered and relaxed (no barrier
> +semantics) definitions.  For compound atomics performing both a load and a
> +store, ACQUIRE semantics apply only to the load and RELEASE semantics apply
> +only to the store portion of the operation.
>  
>  Memory barriers are only required where there's a possibility of interaction
>  between two CPUs or between a CPU and a device.  If it can be guaranteed that
> -- 
> 2.1.4
> 

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