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Message-ID: <1461306464-19521-2-git-send-email-yangbo.lu@nxp.com>
Date: Fri, 22 Apr 2016 14:27:38 +0800
From: Yangbo Lu <yangbo.lu@....com>
To: <linux-mmc@...r.kernel.org>, <linuxppc-dev@...ts.ozlabs.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-i2c@...r.kernel.org>, <iommu@...ts.linux-foundation.org>,
<netdev@...r.kernel.org>
CC: <ulf.hansson@...aro.org>, <scott.wood@....com>,
Rob Herring <robh+dt@...nel.org>,
Russell King <linux@....linux.org.uk>,
Jochen Friedrich <jochen@...am.de>,
Joerg Roedel <joro@...tes.org>,
Claudiu Manoil <claudiu.manoil@...escale.com>,
Bhupesh Sharma <bhupesh.sharma@...escale.com>,
Zhao Qiang <qiang.zhao@...escale.com>,
"Kumar Gala" <galak@...eaurora.org>,
Santosh Shilimkar <ssantosh@...nel.org>, <leoyang.li@....com>,
<xiaobo.xie@....com>, Yangbo Lu <yangbo.lu@....com>
Subject: [v8, 1/7] Documentation: DT: update Freescale DCFG compatible
Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips.
Signed-off-by: Yangbo Lu <yangbo.lu@....com>
---
Changes for v8:
- Added this patch
---
Documentation/devicetree/bindings/arm/fsl.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 752a685..1d5f512 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,7 @@ Freescale DCFG
configuration and status for the device. Such as setting the secondary
core start address and release the secondary core from holdoff and startup.
Required properties:
- - compatible: should be "fsl,ls1021a-dcfg"
+ - compatible: should be "fsl,<chip>-dcfg"
- reg : should contain base address and length of DCFG memory-mapped registers
Example:
--
2.1.0.27.g96db324
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