lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <tip-b89c173788c3a8ed571652c203bf59a0e9d700aa@git.kernel.org>
Date:	Sat, 23 Apr 2016 05:52:46 -0700
From:	tip-bot for Andi Kleen <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	ak@...ux.intel.com, linux-kernel@...r.kernel.org, mingo@...nel.org,
	tglx@...utronix.de, alexander.shishkin@...ux.intel.com,
	eranian@...gle.com, torvalds@...ux-foundation.org,
	vincent.weaver@...ne.edu, peterz@...radead.org, jolsa@...hat.com,
	hpa@...or.com, acme@...hat.com
Subject: [tip:perf/core] perf/x86/intel: Add model number for Skylake Server
 to perf

Commit-ID:  b89c173788c3a8ed571652c203bf59a0e9d700aa
Gitweb:     http://git.kernel.org/tip/b89c173788c3a8ed571652c203bf59a0e9d700aa
Author:     Andi Kleen <ak@...ux.intel.com>
AuthorDate: Fri, 15 Apr 2016 13:25:33 -0700
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Sat, 23 Apr 2016 13:46:44 +0200

perf/x86/intel: Add model number for Skylake Server to perf

Everything the same as base Skylake, just a new model number.

Signed-off-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
Link: http://lkml.kernel.org/r/1460751933-2264-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/events/intel/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 68fa55b..aff7988 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3639,6 +3639,7 @@ __init int intel_pmu_init(void)
 
 	case 78: /* 14nm Skylake Mobile */
 	case 94: /* 14nm Skylake Desktop */
+	case 85: /* 14nm Skylake Server */
 		x86_pmu.late_ack = true;
 		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ