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Message-ID: <1461606768-14404-8-git-send-email-tthayer@opensource.altera.com>
Date:	Mon, 25 Apr 2016 12:52:48 -0500
From:	<tthayer@...nsource.altera.com>
To:	<bp@...en8.de>, <dougthompson@...ssion.com>,
	<m.chehab@...sung.com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
	<galak@...eaurora.org>, <linux@....linux.org.uk>,
	<dinguyen@...nsource.altera.com>, <grant.likely@...aro.org>
CC:	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <tthayer.linux@...il.com>,
	<tthayer@...nsource.altera.com>
Subject: [PATCHv2 7/7] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry

From: Thor Thayer <tthayer@...nsource.altera.com>

Add the device tree entries needed to support the Altera Ethernet
FIFO buffer EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@...nsource.altera.com>
---
v2  No change
---
 arch/arm/boot/dts/socfpga_arria10.dtsi |   36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 27cc497..6195ade 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -617,6 +617,42 @@
 				compatible = "altr,socfpga-a10-ocram-ecc";
 				reg = <0xff8c3000 0x400>;
 			};
+
+			emac0-rx-ecc@...c0800 {
+				compatible = "altr,socfpga-a10-emac0-rx-ecc";
+				reg = <0xff8c0800 0x400>;
+				parent = <&gmac0>;
+			};
+
+			emac0-tx-ecc@...c0c00 {
+				compatible = "altr,socfpga-a10-emac0-tx-ecc";
+				reg = <0xff8c0c00 0x400>;
+				parent = <&gmac0>;
+			};
+
+			emac1-rx-ecc@...c1000 {
+				compatible = "altr,socfpga-a10-emac1-rx-ecc";
+				reg = <0xff8c1000 0x400>;
+				parent = <&gmac1>;
+			};
+
+			emac1-tx-ecc@...c1400 {
+				compatible = "altr,socfpga-a10-emac1-tx-ecc";
+				reg = <0xff8c1400 0x400>;
+				parent = <&gmac1>;
+			};
+
+			emac2-rx-ecc@...c1800 {
+				compatible = "altr,socfpga-a10-emac2-rx-ecc";
+				reg = <0xff8c1800 0x400>;
+				parent = <&gmac2>;
+			};
+
+			emac2-tx-ecc@...c1c00 {
+				compatible = "altr,socfpga-a10-emac2-tx-ecc";
+				reg = <0xff8c1c00 0x400>;
+				parent = <&gmac2>;
+			};
 		};
 
 		rst: rstmgr@...05000 {
-- 
1.7.9.5

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