linux-kernel - Re: [PATCH 0/6] Intel Secure Guard Extensions

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CALCETrVdMEpOnE9f95+dWOeCqmcyxHFzDxkWnf5LfOT4ZyiOhw@mail.gmail.com>
Date:	Mon, 25 Apr 2016 12:20:57 -0700
From:	Andy Lutomirski <luto@...capital.net>
To:	Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc:	Greg KH <gregkh@...uxfoundation.org>,
	Andy Lutomirski <luto@...nel.org>,
	Borislav Petkov <bp@...e.de>,
	Boris Ostrovsky <boris.ostrovsky@...cle.com>,
	"open list:STAGING SUBSYSTEM" <devel@...verdev.osuosl.org>,
	Ingo Molnar <mingo@...nel.org>,
	Kristen Carlson Accardi <kristen@...ux.intel.com>,
	"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
	open list <linux-kernel@...r.kernel.org>,
	Mathias Krause <minipli@...glemail.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Wan Zongshun <Vincent.Wan@....com>
Subject: Re: [PATCH 0/6] Intel Secure Guard Extensions

On Mon, Apr 25, 2016 at 12:03 PM, Jarkko Sakkinen
<jarkko.sakkinen@...ux.intel.com> wrote:
> On Mon, Apr 25, 2016 at 10:53:52AM -0700, Greg KH wrote:
>> On Mon, Apr 25, 2016 at 08:34:07PM +0300, Jarkko Sakkinen wrote:
>> > Intel(R) SGX is a set of CPU instructions that can be used by
>> > applications to set aside private regions of code and data.  The code
>> > outside the enclave is disallowed to access the memory inside the
>> > enclave by the CPU access control.
>> >
>> > The firmware uses PRMRR registers to reserve an area of physical memory
>> > called Enclave Page Cache (EPC). There is a hardware unit in the
>> > processor called Memory Encryption Engine. The MEE encrypts and decrypts
>> > the EPC pages as they enter and leave the processor package.
>> >
>> > Jarkko Sakkinen (5):
>> >   x86, sgx:  common macros and definitions
>> >   intel_sgx: driver for Intel Secure Guard eXtensions
>> >   intel_sgx: ptrace() support for the driver
>> >   intel_sgx: driver documentation
>> >   intel_sgx: TODO file for the staging area
>> >
>> > Kai Huang (1):
>> >   x86: add SGX definition to cpufeature
>> >
>> >  Documentation/x86/intel_sgx.txt               |  86 +++
>> >  arch/x86/include/asm/cpufeature.h             |   1 +
>> >  arch/x86/include/asm/sgx.h                    | 253 +++++++
>>
>> Why are you asking for this to go into staging?
>>
>> What is keeping it out of the "real" part of the kernel tree?
>
> Now that I think of it nothing as long as the API is fixed the way you
> suggested and my TODO list is cleared.
>
> I think I prepare a new version of the patches and point it directly
> to arch/x86.

Thanks.  Please cc me as well.

--Andy

>
>> And staging code is self-contained, putting files in arch/* isn't ok for
>> it, which kind of implies that you should get this merged correctly.
>>
>> I need a lot more information here before I can take this code...
>>
>> thanks,
>>
>> greg k-h
>
> /Jarkko



-- 
Andy Lutomirski
AMA Capital Management, LLC