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Date: Tue, 26 Apr 2016 17:45:20 -0500 From: Tom Lendacky <thomas.lendacky@....com> To: <linux-arch@...r.kernel.org>, <linux-efi@...r.kernel.org>, <kvm@...r.kernel.org>, <linux-doc@...r.kernel.org>, <x86@...nel.org>, <linux-kernel@...r.kernel.org>, <kasan-dev@...glegroups.com>, <linux-mm@...ck.org>, <iommu@...ts.linux-foundation.org> CC: Radim Krčmář <rkrcmar@...hat.com>, Arnd Bergmann <arnd@...db.de>, Jonathan Corbet <corbet@....net>, Matt Fleming <matt@...eblueprint.co.uk>, Joerg Roedel <joro@...tes.org>, "Konrad Rzeszutek Wilk" <konrad.wilk@...cle.com>, Paolo Bonzini <pbonzini@...hat.com>, "Ingo Molnar" <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>, Andrey Ryabinin <aryabinin@...tuozzo.com>, "Alexander Potapenko" <glider@...gle.com>, Thomas Gleixner <tglx@...utronix.de>, "Dmitry Vyukov" <dvyukov@...gle.com> Subject: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors For AMD processors that support PAT, set the write-protect cache mode (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05). Signed-off-by: Tom Lendacky <thomas.lendacky@....com> --- arch/x86/mm/pat.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index fb0604f..dda78ed 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c @@ -345,6 +345,8 @@ void pat_init(void) * we lose performance without causing a correctness issue. * Pentium 4 erratum N46 is an example for such an erratum, * although we try not to use PAT at all on affected CPUs. + * AMD processors support write-protect so initialize the + * PAT slot 5 appropriately. * * PTE encoding: * PAT @@ -356,7 +358,7 @@ void pat_init(void) * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS * 011 3 UC : _PAGE_CACHE_MODE_UC * 100 4 WB : Reserved - * 101 5 WC : Reserved + * 101 5 WC : Reserved (AMD: _PAGE_CACHE_MODE_WP) * 110 6 UC-: Reserved * 111 7 WT : _PAGE_CACHE_MODE_WT * @@ -364,7 +366,12 @@ void pat_init(void) * corresponding types in the presence of PAT errata. */ pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | - PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT); + PAT(4, WB) | PAT(6, UC_MINUS) | PAT(7, WT); + + if (c->x86_vendor == X86_VENDOR_AMD) + pat |= PAT(5, WP); + else + pat |= PAT(5, WC); } if (!boot_cpu_done) {
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