linux-kernel - Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait()

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 26 Apr 2016 18:15:43 +0100
From:	Will Deacon <will.deacon@....com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	linux-kernel@...r.kernel.org, waiman.long@....com,
	mingo@...hat.com, paulmck@...ux.vnet.ibm.com, boqun.feng@...il.com,
	torvalds@...ux-foundation.org, dave@...olabs.net
Subject: Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait()

On Tue, Apr 26, 2016 at 05:33:44PM +0100, Will Deacon wrote:
> From 5aa5750d5eeb6e3a42f5547f094dc803f89793bb Mon Sep 17 00:00:00 2001
> From: Will Deacon <will.deacon@....com>
> Date: Tue, 26 Apr 2016 17:31:53 +0100
> Subject: [PATCH] fixup! locking,arm64: Introduce cmpwait()
> 
> Signed-off-by: Will Deacon <will.deacon@....com>
> ---
>  arch/arm64/include/asm/cmpxchg.h | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
> index cd7bff6ddedc..9b7113a3f0d7 100644
> --- a/arch/arm64/include/asm/cmpxchg.h
> +++ b/arch/arm64/include/asm/cmpxchg.h
> @@ -225,18 +225,19 @@ __CMPXCHG_GEN(_mb)
>  })
>  
>  #define __CMPWAIT_GEN(w, sz, name)					\
> -void __cmpwait_case_##name(volatile void *ptr, unsigned long val)	\
> +static inline void __cmpwait_case_##name(volatile void *ptr,		\
> +					 unsigned long val)		\
>  {									\
>  	unsigned long tmp;						\
>  									\
>  	asm volatile(							\
>  	"	ldxr" #sz "\t%" #w "[tmp], %[v]\n"			\
>  	"	eor	%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n"	\
> -	"	cbnz	%" #w "[tmp], 1f\n"				\
> +	"	cbz	%" #w "[tmp], 1f\n"				\

Actually, you're right with cbnz. I only noticed when I came to implement
my own version of smp_cond_load_acquire. *sigh*

I have fixups applied locally, so maybe the best thing is for me to send
you an arm64 series on top of whatever you post next?

Will