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Message-ID: <5720F609.6030501@arm.com>
Date: Wed, 27 Apr 2016 18:25:29 +0100
From: Suzuki K Poulose <Suzuki.Poulose@....com>
To: Mathieu Poirier <mathieu.poirier@...aro.org>
Cc: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V4 16/18] coresight: tmc: implementing TMC-ETF AUX space
API
On 27/04/16 18:22, Mathieu Poirier wrote:
> On 27 April 2016 at 05:21, Suzuki K Poulose <Suzuki.Poulose@....com> wrote:
>> On 26/04/16 23:10, Mathieu Poirier wrote:
>>>
>>> This patch implement the AUX area interfaces required to
>>> use the TMC (configured as an ETF) from the Perf sub-system.
>>>
>>> The heuristic is heavily borrowed from the ETB10 implementation.
>>>
>>> Signed-off-by: Mathieu Poirier <mathieu.poirier@...aro.org>
>>
>>
>>> +
>>> + /*
>>> + * Make sure the new size is aligned in accordance with
>>> the
>>> + * requirement explained above.
>>> + */
>>> + to_read = handle->size & mask;
>>> + /* Move the RAM read pointer up */
>>> + read_ptr = (write_ptr + drvdata->size) - to_read;
>>> + /* Make sure we are still within our limits */
>>> + read_ptr &= ~(drvdata->size - 1);
>>
>>
>> Correct me if I am wrong, I think this will break for ETR configuration
>> (used from the following
>> patch 17/18). Since, for ETR, RRP/RWP will return the lower 32bit AXI
>> address (not the queue offset).
>> So the last step would really spoil the read_ptr. We might have to set the
>> read_ptr by adding the
>> appropriate offset from DBAL0.
>
> That's a very good catch. It also means we ETR support (17/18) has to
> be dropped from this set. I will do a respin of this patch only.
And you also need (a separate patch) to fix the etb10 driver where this bug originated.
Suzuki
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