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Date:	Wed, 27 Apr 2016 12:32:22 +1000
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Daniel Vetter <daniel.vetter@...ll.ch>,
	<intel-gfx@...ts.freedesktop.org>,
	<dri-devel@...ts.freedesktop.org>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Lyude <cpaul@...hat.com>,
	Yetunde Adebisi <yetundex.adebisi@...el.com>
Subject: linux-next: manual merge of the drm-misc tree with the drm-intel
 tree

Hi all,

Today's linux-next merge of the drm-misc tree got a conflict in:

  drivers/gpu/drm/i915/intel_dp.c

between commit:

  86ee27b5aa75 ("drm/i915: Read eDP Display control capability registers")

from the drm-intel tree and commit:

  9f085ebb1a50 ("rm/i915: Get rid of intel_dp_dpcd_read_wake()")

from the drm-misc tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/intel_dp.c
index 6bb0b2340e7c,b52676a032f9..000000000000
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -3747,9 -3744,10 +3714,9 @@@ intel_dp_get_dpcd(struct intel_dp *inte
  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
  	struct drm_device *dev = dig_port->base.base.dev;
  	struct drm_i915_private *dev_priv = dev->dev_private;
 -	uint8_t rev;
  
- 	if (intel_dp_dpcd_read_wake(&intel_dp->aux, 0x000, intel_dp->dpcd,
- 				    sizeof(intel_dp->dpcd)) < 0)
+ 	if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd,
+ 			     sizeof(intel_dp->dpcd)) < 0)
  		return false; /* aux transfer failed */
  
  	DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd);
@@@ -3803,15 -3801,6 +3770,15 @@@
  			DRM_DEBUG_KMS("PSR2 %s on sink",
  				dev_priv->psr.psr2_support ? "supported" : "not supported");
  		}
 +
 +		/* Read the eDP Display control capabilities registers */
 +		memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
 +		if ((intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) &&
- 				(intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV,
++				(drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
 +						intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==
 +								sizeof(intel_dp->edp_dpcd)))
 +			DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd),
 +					intel_dp->edp_dpcd);
  	}
  
  	DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n",

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