linux-kernel - RE: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation

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Date:	Wed, 27 Apr 2016 07:33:22 +0000
From:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
To:	Lars-Peter Clausen <lars@...afoo.de>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"galak@...eaurora.org" <galak@...eaurora.org>,
	Michal Simek <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"vinod.koul@...el.com" <vinod.koul@...el.com>,
	"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
	"moritz.fischer@...us.com" <moritz.fischer@...us.com>,
	"laurent.pinchart@...asonboard.com" 
	<laurent.pinchart@...asonboard.com>,
	"luis@...ethencourt.com" <luis@...ethencourt.com>,
	Anirudha Sarangi <anirudh@...inx.com>,
	"Punnaiah Choudary Kalluri" <punnaia@...inx.com>
CC:	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>
Subject: RE: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma
 device tree binding documentation

Hi Lars,

> -----Original Message-----
> From: Lars-Peter Clausen [mailto:lars@...afoo.de]
> Sent: Wednesday, April 27, 2016 12:42 PM
> To: Appana Durga Kedareswara Rao <appanad@...inx.com>;
> robh+dt@...nel.org; pawel.moll@....com; mark.rutland@....com;
> ijc+devicetree@...lion.org.uk; galak@...eaurora.org; Michal Simek
> <michals@...inx.com>; Soren Brinkmann <sorenb@...inx.com>;
> vinod.koul@...el.com; dan.j.williams@...el.com; Appana Durga Kedareswara
> Rao <appanad@...inx.com>; moritz.fischer@...us.com;
> laurent.pinchart@...asonboard.com; luis@...ethencourt.com; Anirudha
> Sarangi <anirudh@...inx.com>; Punnaiah Choudary Kalluri
> <punnaia@...inx.com>
> Cc: devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; dmaengine@...r.kernel.org
> Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma
> device tree binding documentation
> 
> On 04/27/2016 09:05 AM, Kedareswara rao Appana wrote:
> [...]
> > +- xlnx,include-sg	: Indicates the controller to operate in simple or
> > +			  scatter gather dma mode
> > +- xlnx,ratectrl		: Scheduling interval in terms of clock cycles for
> > +			  source AXI transaction
> > +- xlnx,overfetch	: Tells whether the channel is allowed to over
> > +			  fetch the data
> > +- xlnx,src-issue	: Number of AXI outstanding transactions on source
> side
> > +- xlnx,src-burst-len	: AXI length for data read. Support only power of
> > +			  2 byte values.
> > +- xlnx,dst-burst-len	: AXI length for data write. Support only power of
> 
> These are all software runtime configuration parameters that you'd want to
> change at runtime depending on which peripheral you are targeting with a
> specific DMA transfer. These really do not belong into the devicetree.

You mean to have a separate config structure in the driver and handle the above parameters
Through that structure???

I understand that above will work for slave dma transfer types what about memory to memory
Transfers where we don't have provision to the use this parameters...

Regards,
Kedar.