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Message-ID: <CALCETrV+JzPZjrrqkhWSVfvKQt62Aq8NSW=ZvfdiAi8XKoLi8A@mail.gmail.com>
Date: Wed, 27 Apr 2016 07:47:44 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Tom Lendacky <thomas.lendacky@....com>
Cc: linux-arch <linux-arch@...r.kernel.org>,
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Subject: Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for
AMD processors
On Wed, Apr 27, 2016 at 7:44 AM, Tom Lendacky <thomas.lendacky@....com> wrote:
> On 04/27/2016 09:33 AM, Andy Lutomirski wrote:
>> On Tue, Apr 26, 2016 at 3:56 PM, Tom Lendacky <thomas.lendacky@....com> wrote:
>>> For AMD processors that support PAT, set the write-protect cache mode
>>> (_PAGE_CACHE_MODE_WP) entry to the actual write-protect value (x05).
>>
>> What's the purpose of using the WP memory type?
>
> The WP memory type is used for encrypting or decrypting data "in place".
> The use of the WP on the source data will prevent any of the source
> data from being cached. Refer to section 7.10.8 "Encrypt-in-Place" in
> the AMD64 APM link provided in the cover letter.
>
> This memory type will be used in subsequent patches for this purpose.
OK.
Why AMD-only? I thought Intel supported WP, too.
--Andy
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