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Message-Id: <1461835870-67778-4-git-send-email-chandan.kumar@linux.vnet.ibm.com>
Date: Thu, 28 Apr 2016 15:01:10 +0530
From: Chandan Kumar <chandan.kumar@...ux.vnet.ibm.com>
To: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Cc: acme@...hat.com, mpe@...erman.id.au, jolsa@...hat.com,
anju@...ux.vnet.ibm.com, maddy@...ux.vnet.ibm.com,
naveen.n.rao@...ux.vnet.ibm.com, hemant@...ux.vnet.ibm.com
Subject: [PATCH 3/3] perf tools: Fix perf regs mask generation
From: "Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>
On some architectures (powerpc in particular), the number of registers
exceeds what can be represented in an integer bitmask. Ensure we
generate the proper bitmask on such platforms.
Fixes: 71ad0f5e4 ("perf tools: Support for DWARF CFI unwinding on post
processing")
Signed-off-by: Naveen N. Rao <naveen.n.rao@...ux.vnet.ibm.com>
---
tools/perf/util/perf_regs.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tools/perf/util/perf_regs.c b/tools/perf/util/perf_regs.c
index 6b8eb13..c4023f2 100644
--- a/tools/perf/util/perf_regs.c
+++ b/tools/perf/util/perf_regs.c
@@ -12,18 +12,18 @@ int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
int i, idx = 0;
u64 mask = regs->mask;
- if (regs->cache_mask & (1 << id))
+ if (regs->cache_mask & (1ULL << id))
goto out;
- if (!(mask & (1 << id)))
+ if (!(mask & (1ULL << id)))
return -EINVAL;
for (i = 0; i < id; i++) {
- if (mask & (1 << i))
+ if (mask & (1ULL << i))
idx++;
}
- regs->cache_mask |= (1 << id);
+ regs->cache_mask |= (1ULL << id);
regs->cache_regs[id] = regs->regs[idx];
out:
--
1.9.3
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