lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <5728CCB9.9030209@wwwdotorg.org>
Date:	Tue, 3 May 2016 10:07:21 -0600
From:	Stephen Warren <swarren@...dotorg.org>
To:	Laxman Dewangan <ldewangan@...dia.com>
Cc:	linus.walleij@...aro.org, thierry.reding@...il.com,
	gnurou@...il.com, rklein@...dia.com, linux-gpio@...r.kernel.org,
	linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2] pinctrl: tegra: avoid parked_reg and parked_bank

On 05/02/2016 12:47 PM, Laxman Dewangan wrote:
> NVIDIA's Tegra210 support the park bit to make pinmux configuration
> enable/disable. If parked bit is 1 then configuration does not apply
> and if it is 0 then pinmux configuration applies. This is to support
> to avoid any glitch in pinmux configurations.
>
> The parked bit is part of mux register and mux bank and hence it is
> not required to have member for the parked_reg and parked bank very
> similar to other bit field of the same register.
>
> Remove the need of the parked register and parked bank and get whether
> parked function supported or not by parked_bit.
>
> This is to make the parked bit handling same as other fields of mux
> registers.

Acked-by: Stephen Warren <swarren@...dia.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ