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Message-ID: <CANCTEQgjiuQXcaw=3Dr5kUsTPc3nsDQf2odwzs4nHvrkREAqrg@mail.gmail.com>
Date: Wed, 4 May 2016 15:30:39 +0300
From: Radoslav Kolev <radoslav.kolev@...edlynx.com>
To: Chen-Yu Tsai <wens@...e.org>
Cc: Olliver Schinagl <oliver@...inagl.nl>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Tsvetan Usunov <tsvetan@...mex.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>,
Hans de Goede <hdegoede@...hat.com>,
dev <dev@...ux-sunxi.org>,
devicetree <devicetree@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] ARM: dts: sunxi: Add a olinuxino-lime2-emmc
2016-05-03 10:25 GMT+03:00 Chen-Yu Tsai <wens@...e.org>:
> On Tue, May 3, 2016 at 3:21 PM, Olliver Schinagl <oliver@...inagl.nl> wrote:
>>>> + bus-width = <4>;
>>>
>>> Only 4 bits? We normally see eMMC with 8 bits. 4 bits are some kind of
>>> embedded SD card.
>>
>> On A20 as well? Our investigations so far have concluded that the A10 and
>> A20 have those pins not mapped out to pads. The IP does support it however
>> we assume.
>
> You're right. My bad. First time A10/A20 sees eMMC support.
I can't say anything about A10/A20, but I have a board with A13 and
the same eMMC chip and it works fine in 8 bit mode.
Regards,
Radoslav
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