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Date: Thu, 5 May 2016 11:29:14 +0800
From: Wei Ni <wni@...dia.com>
To: Rob Herring <robh@...nel.org>
CC: <edubezval@...il.com>, <thierry.reding@...il.com>,
<rui.zhang@...el.com>, <MLongnecker@...dia.com>,
<swarren@...dotorg.org>, <mikko.perttunen@...si.fi>,
<linux-tegra@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 01/11] of: Add bindings of hw throttle for Tegra soctherm
On 2016年05月04日 21:35, Rob Herring wrote:
> On Tue, May 03, 2016 at 06:13:20PM +0800, Wei Ni wrote:
>> Add HW throttle configuration sub-node for soctherm, which
>> is used to describe the throttle event, and worked as a
>> cooling device. The "hot" type trip in thermal zone can
>> be bound to this cooling device, and trigger the throttle
>> function.
>>
>> Signed-off-by: Wei Ni <wni@...dia.com>
>> ---
>> .../bindings/thermal/nvidia,tegra124-soctherm.txt | 120 ++++++++++++++++++++-
>> 1 file changed, 118 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> index edebfa0a985e..6ba8ae3f59ed 100644
>> --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
>> @@ -10,8 +10,14 @@ Required properties :
>> - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
>> For Tegra132, must contain "nvidia,tegra132-soctherm".
>> For Tegra210, must contain "nvidia,tegra210-soctherm".
>> -- reg : Should contain 1 entry:
>> +- reg : Should contain at least 2 entries for each entry in reg-names:
>> - SOCTHERM register set
>> + - Tegra CAR register set: Required for Tegra124 and Tegra210.
>> + - CCROC register set: Required for Tegra132.
>> +- reg-names : Should contain at least 2 entries:
>> + - soctherm-reg
>> + - car-reg
>> + - ccroc-reg
>> - interrupts : Defines the interrupt used by SOCTHERM
>> - clocks : Must contain an entry for each entry in clock-names.
>> See ../clocks/clock-bindings.txt for details.
>> @@ -25,17 +31,44 @@ Required properties :
>> - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
>> of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
>> list of valid values when referring to thermal sensors.
>> +- nvidia,throttle-cfgs: A sub-node which is a container of configuration for
>> + each hardware throttle events. These events can be set as cooling devices.
>> + * throttle events: Sub-nodes must be named as "nvidia,light" or "nvidia,heavy".
>> + Properties:
>> + - nvidia,priority: Each throttles has its own throttle settings, so the
>> + SW need to set priorities for various throttle, the HW arbiter can select
>> + the final throttle settings.
>> + Bigger value indicates higher priority, In general, higher priority
>> + translates to lower target frequency. SW needs to ensure that critical
>> + thermal alarms are given higher priority, and ensure that there is
>> + no race if priority of two vectors is set to the same value.
>
> What are valid range of values?
The valid range is 1~100, will update it.
>
>> + - nvidia,cpu-throt-depth: This property is for Tegra124 and Tegra210.
>> + It is the throttling depth of pulse skippers, it's the percentage
>> + throttling.
>
> Add unit suffix (-percent)
Will change to "nvidia,cpu-throt-percent".
>
>> + - nvidia,cpu-throt-level: This property is only for Tegra132, it is the
>> + level of pulse skippers, which used to throttle clock frequencies. It
>> + indicates cpu clock throttling depth, and the depth can be programmed.
>> + Must set as following values:
>> + TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
>> + TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
>> + - #cooling-cells: Should be 1. This cooling device only support on/off state.
>> + See ./thermal.txt for a description of this property.
>>
>> Note:
>> - the "critical" type trip points will be set to SOC_THERM hardware as the
>> shut down temperature. Once the temperature of this thermal zone is higher
>> than it, the system will be shutdown or reset by hardware.
>> +- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
>> +temperature. Once the the temperature of this thermal zone is higher
>> +than it, it will trigger the HW throttle event.
>>
>> Example :
>>
>> soctherm@...e2000 {
>> compatible = "nvidia,tegra124-soctherm";
>> - reg = <0x0 0x700e2000 0x0 0x1000>;
>> + reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
>> + 0x0 0x60006000 0x0 0x400 /* CAR reg_base */
>> + reg-names = "soctherm-reg", "car-reg";
>> interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
>> <&tegra_car TEGRA124_CLK_SOC_THERM>;
>> @@ -44,6 +77,76 @@ Example :
>> reset-names = "soctherm";
>>
>> #thermal-sensor-cells = <1>;
>> +
>> + nvidia,throttle-cfgs {
>
> Drop the vendor prefix in node names.
Will do it.
>
>> + /*
>> + * When the "heavy" cooling device triggered,
>> + * the HW will skip cpu clock's pulse in 85% depth
>> + */
>> + throttle_heavy: nvidia,heavy {
>> + nvidia,priority = <100>;
>> + nvidia,cpu-throt-depth = <85>;
>> +
>> + #cooling-cells = <1>;
>> + };
>> +
>> + /*
>> + * When the "light" cooling device triggered,
>> + * the HW will skip cpu clock's pulse in 50% depth
>> + */
>> + throttle_light: nvidia,light {
>> + nvidia,priority = <80>;
>> + nvidia,cpu-throt-depth = <50>;
>> +
>> + #cooling-cells = <1>;
>> + };
>> +
>> + /*
>> + * If these two devices are triggered in same time, the HW throttle
>> + * arbiter will select the highest priority as the final throttle
>> + * settings to skip cpu pulse.
>> + */
>> + };
>> + };
>> +
>> +Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
>> +
>> + soctherm@0,700e2000 {
>
> Drop the comma in the unit address.
Will fix it.
>
>> + compatible = "nvidia,tegra132-soctherm";
>> + reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
>> + 0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
>> + reg-names = "soctherm-reg", "ccroc-reg";
>> +
>> + nvidia,throttle-cfgs {
>> + /*
>> + * When the "heavy" cooling device triggered,
>> + * the HW will skip cpu clock's pulse in HIGH level
>> + */
>> + throttle_heavy: nvidia,heavy {
>> + nvidia,priority = <100>;
>> + nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
>> +
>> + #cooling-cells = <1>;
>> + };
>> +
>> + /*
>> + * When the "light" cooling device triggered,
>> + * the HW will skip cpu clock's pulse in MED level
>> + */
>> + throttle_light: nvidia,light {
>> + nvidia,priority = <80>;
>> + nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
>> +
>> + #cooling-cells = <1>;
>> + };
>> +
>> + /*
>> + * If these two devices are triggered in same time, the HW throttle
>> + * arbiter will select the highest priority as the final throttle
>> + * settings to skip cpu pulse.
>> + */
>> +
>> + };
>> };
>>
>> Example: referring to thermal sensors :
>> @@ -62,6 +165,19 @@ Example: referring to thermal sensors :
>> hysteresis = <1000>;
>> type = "critical";
>> };
>> +
>> + cpu_throttle_trip: throttle-trip {
>> + temperature = <100000>;
>> + hysteresis = <1000>;
>> + type = "hot";
>> + };
>> + };
>> +
>> + cooling-maps {
>> + map0 {
>> + trip = <&cpu_throttle_trip>;
>> + cooling-device = <&throttle_heavy 1 1>;
>> + };
>> };
>> };
>> };
>> --
>> 1.9.1
>>
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