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Date: Thu, 5 May 2016 18:45:52 -0500
From: Timur Tabi <timur@...eaurora.org>
To: Guenter Roeck <linux@...ck-us.net>,
Pratyush Anand <panand@...hat.com>
Cc: fu.wei@...aro.org, Suravee.Suthikulpanit@....com, wim@...ana.be,
linux-arm-kernel@...ts.infradead.org,
linux-watchdog@...r.kernel.org,
open list <linux-kernel@...r.kernel.org>,
Dave Young <dyoung@...hat.com>, kexec@...ts.infradead.org
Subject: Re: [PATCH RFC] Watchdog: sbsa_gwdt: Enhance timeout range
Timur Tabi wrote:
>
>> A 32-bit counter is absolutely fine. Letting it run with a 400MHz clock
>> (or was it 200 MHz ?) is the problem. A resolution of 2.5ns for a
>> watchdog
>> timer does not really make any sense.
>
> The 10 second limit is based on a 20MHz clock.
No, that's not true. I misread the code. I knew something was wrong,
but it didn't click until just now.
The default timeout is 10 seconds. The max timeout on a 20MHz system
(which is what we're running) is over 200 seconds.
The problem is that Pratyush's system is running at a clock that's way
too fast:
[ 131.187562] sbsa-gwdt sbsa-gwdt.0: Initialized with 40s timeout @
250000000 Hz, action=1.
250MHz is unreasonable. Pratyush, why is your system counter so high?
On our ARM64 system, it's set to 20MHz.
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