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Message-ID: <20160506173531.GU3492@codeaurora.org>
Date: Fri, 6 May 2016 10:35:31 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Jose Abreu <Jose.Abreu@...opsys.com>
Cc: linux-clk@...r.kernel.org,
Carlos Palminha <CARLOS.PALMINHA@...opsys.com>,
Rob Herring <robh@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Michael Turquette <mturquette@...libre.com>,
Alexey Brodkin <Alexey.Brodkin@...opsys.com>,
Vineet Gupta <Vineet.Gupta1@...opsys.com>,
linux-snps-arc@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH 1/2 v6] clk/axs10x: Add I2S PLL clock driver
On 05/02, Jose Abreu wrote:
> The ARC SDP I2S clock can be programmed using a
> specific PLL.
>
> This patch has the goal of adding a clock driver
> that programs this PLL.
>
> At this moment the rate values are hardcoded in
> a table but in the future it would be ideal to
> use a function which determines the PLL values
> given the desired rate.
>
> Signed-off-by: Jose Abreu <joabreu@...opsys.com>
> ---
Applied to clk-next
I'm not applying the arc dts file (patch #2 in this series).
--
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