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Message-ID: <20160509232908.GD3492@codeaurora.org>
Date: Mon, 9 May 2016 16:29:08 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Harvey Hunt <harvey.hunt@...tec.com>
Cc: mturquette@...libre.com, Paul Burton <paul.burton@...tec.com>,
Ralf Baechle <ralf@...ux-mips.org>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] clk: ingenic: Allow divider value to be divided
On 05/09, Harvey Hunt wrote:
> The JZ4780's MSC clock divider registers multiply the clock divider by 2.
> This means that MMC devices run at half their expected speed. Add the
> ability to divide the clock divider in order to solve this.
>
> Signed-off-by: Harvey Hunt <harvey.hunt@...tec.com>
>
> Cc: Paul Burton <paul.burton@...tec.com>
> Cc: Ralf Baechle <ralf@...ux-mips.org>
> Cc: linux-clk@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> ---
Applied to clk-next
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