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Message-Id: <1462837612-7803-5-git-send-email-david@lechnology.com>
Date:	Mon,  9 May 2016 18:46:51 -0500
From:	David Lechner <david@...hnology.com>
To:	nsekhar@...com, khilman@...nel.org
Cc:	David Lechner <david@...hnology.com>, petr@...ix.com,
	sergei.shtylyov@...entembedded.com,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Kishon Vijay Abraham I <kishon@...com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Alan Stern <stern@...land.harvard.edu>, Bin Liu <b-liu@...com>,
	Lee Jones <lee.jones@...aro.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org
Subject: [PATCH v5 4/5] ARM: DTS: da850: Add cfgchip syscon node

Add a syscon node for the SoC CFGCHIPn registers. This is needed for
the new usb phy driver.

Signed-off-by: David Lechner <david@...hnology.com>
---
 arch/arm/boot/dts/da850.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index cf1aad8..9546ace 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -168,6 +168,10 @@
 			};
 
 		};
+		cfgchip: cfgchip@...7c {
+			compatible = "ti,da830-cfgchip", "syscon";
+			reg = <0x1417c 0x14>;
+		};
 		edma0: edma@0 {
 			compatible = "ti,edma3-tpcc";
 			/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
-- 
2.7.4

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