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Message-ID: <20160512051347.GE8453@hector.attlocal.net>
Date:	Thu, 12 May 2016 00:13:47 -0500
From:	Andy Gross <andy.gross@...aro.org>
To:	Abhishek Sahu <absahu@...eaurora.org>
Cc:	Sricharan <sricharan@...eaurora.org>, agross@...eaurora.org,
	architt@...eaurora.org, linux-arm-msm@...r.kernel.org,
	ntelkar@...eaurora.org, linux-kernel@...r.kernel.org,
	linux-i2c@...r.kernel.org, dmaengine@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, wsa@...-dreams.de
Subject: Re: [PATCH 1/2] i2c: qup: Cleared the error bits in ISR

On Wed, May 11, 2016 at 11:04:17PM +0530, Abhishek Sahu wrote:

<snip>

> >       In qup_i2c_xfer and qup_i2c_xfer_v2 state is set to RESET at the
> >end, when
> >       there is no error. So would it be fine if we do it there
> >unconditionally ?
> >
> >Regards,
> > Sricharan
> 
> RESET the QUP state wouldn't create any issue in the case of multiple calls.
> The existing code also RESET the QUP state for bus_err but it is not
> clearing
> status bits.

It'd be better to not reset the QUP inside the ISR at all.  I think the better
solution is making the reset occur in the xfer function.  So just clear the bits
like you should in the isr, and defer reset till later.

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