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Message-ID: <5735A776.9050602@rock-chips.com>
Date: Fri, 13 May 2016 18:07:50 +0800
From: William Wu <william.wu@...k-chips.com>
To: gregkh@...uxfoundation.org, balbi@...nel.org, heiko@...ech.de
CC: linux-rockchip@...ts.infradead.org, briannorris@...gle.com,
dianders@...gle.com, kever.yang@...k-chips.com,
huangtao@...k-chips.com, frank.wang@...k-chips.com,
eddie.cai@...k-chips.com, John.Youn@...opsys.com,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org
Subject: Re: [PATCH] usb: dwc3: add DWC3_GUCTL1 reg for debug
On 05/13/2016 06:05 PM, William Wu wrote:
> GUCTL1 reg has some useful functions which can be
> written by user. For rockchip platform, we set
> GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK (bit26, applicable
> for the core is programmed to operate in 2.0 device
> only) to 1 in bootrom, and after start the kernel,
> we want to check whether this bit can be reset to
> default 0 after the core reset. Dump GUCTL1 reg from
> debugfs is more convenient for us.
>
> Signed-off-by: William Wu <william.wu@...k-chips.com>
> ---
> Changes in v2:
> - add commit log
>
> drivers/usb/dwc3/core.h | 1 +
> drivers/usb/dwc3/debugfs.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index abed84f..c4758d5 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -86,6 +86,7 @@
> #define DWC3_GCTL 0xc110
> #define DWC3_GEVTEN 0xc114
> #define DWC3_GSTS 0xc118
> +#define DWC3_GUCTL1 0xc11c
> #define DWC3_GSNPSID 0xc120
> #define DWC3_GGPIO 0xc124
> #define DWC3_GUID 0xc128
> diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c
> index b1dd3c6..f3c9f44 100644
> --- a/drivers/usb/dwc3/debugfs.c
> +++ b/drivers/usb/dwc3/debugfs.c
> @@ -47,6 +47,7 @@ static const struct debugfs_reg32 dwc3_regs[] = {
> dump_register(GCTL),
> dump_register(GEVTEN),
> dump_register(GSTS),
> + dump_register(GUCTL1),
> dump_register(GSNPSID),
> dump_register(GGPIO),
> dump_register(GUID),
I'm sorry for forgot to add v2 in commit. I'll resend it later.
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