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Message-Id: <1463137777-27103-1-git-send-email-guille.rodriguez@gmail.com>
Date: Fri, 13 May 2016 13:09:37 +0200
From: Guillermo Rodriguez <guille.rodriguez@...il.com>
To: Thierry Reding <thierry.reding@...il.com>,
linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org,
Nicolas Ferre <nicolas.ferre@...el.com>
Cc: Guillermo Rodriguez <guille.rodriguez@...il.com>
Subject: [PATCH] pwm: atmel: Fix disabling of PWM channels
When disabling a PWM channel, the PWM clock was being stopped
immediately after writing to PWM_DIS. As a result, the disabling
of the PWM channel did not complete properly, and the PWM output
might be left at the wrong level.
Fix this by waiting for the channel to be effectively disabled
(by checking the PWM_SR register) before disabling the clock.
Signed-off-by: Guillermo Rodriguez <guille.rodriguez@...il.com>
---
drivers/pwm/pwm-atmel.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 0e4bd4e..a714434 100644
--- a/drivers/pwm/pwm-atmel.c
+++ b/drivers/pwm/pwm-atmel.c
@@ -271,6 +271,16 @@ static void atmel_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
mutex_unlock(&atmel_pwm->isr_lock);
atmel_pwm_writel(atmel_pwm, PWM_DIS, 1 << pwm->hwpwm);
+ /*
+ * Wait for the PWM channel disable operation to be effective before
+ * stopping the clock.
+ */
+ timeout = jiffies + 2 * HZ;
+ while ((atmel_pwm_readl(atmel_pwm, PWM_SR)& (1 << pwm->hwpwm)) &&
+ time_before(jiffies, timeout)) {
+ usleep_range(10, 100);
+ }
+
clk_disable(atmel_pwm->clk);
}
--
1.7.9.5
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