| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1463461560-9629-4-git-send-email-purna.mandal@microchip.com>
Date: Tue, 17 May 2016 10:35:53 +0530
From: Purna Chandra Mandal <purna.mandal@...rochip.com>
To: <linux-kernel@...r.kernel.org>
CC: <linux-mips@...ux-mips.org>, Ralf Baechle <ralf@...ux-mips.org>,
Joshua Henderson <digitalpeer@...italpeer.com>,
Purna Chandra Mandal <purna.mandal@...rochip.com>,
Jason Cooper <jason@...edaemon.net>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <marc.zyngier@....com>
Subject: [PATCH 04/11] irqchip: irq-pic32-evic: Fix bug with external interrupts.
From: Joshua Henderson <digitalpeer@...italpeer.com>
The wrong external interrupt bits are being set, offset by 1.
Signed-off-by: Joshua Henderson <digitalpeer@...italpeer.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@...rochip.com>
---
drivers/irqchip/irq-pic32-evic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-pic32-evic.c b/drivers/irqchip/irq-pic32-evic.c
index e7155db..73addb4 100644
--- a/drivers/irqchip/irq-pic32-evic.c
+++ b/drivers/irqchip/irq-pic32-evic.c
@@ -91,7 +91,7 @@ static int pic32_set_type_edge(struct irq_data *data,
/* set polarity for external interrupts only */
for (i = 0; i < ARRAY_SIZE(priv->ext_irqs); i++) {
if (priv->ext_irqs[i] == data->hwirq) {
- ret = pic32_set_ext_polarity(i + 1, flow_type);
+ ret = pic32_set_ext_polarity(i, flow_type);
if (ret)
return ret;
}
--
1.8.3.1
Powered by blists - more mailing lists