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Message-ID: <573B05F3.7000009@iogearbox.net>
Date: Tue, 17 May 2016 13:52:19 +0200
From: Daniel Borkmann <daniel@...earbox.net>
To: Yang Shi <yang.shi@...aro.org>, ast@...nel.org, davem@...emloft.net
CC: will.deacon@....com, catalin.marinas@....com, zlim.lnx@...il.com,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linaro-kernel@...ts.linaro.org
Subject: Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers
use for tmp registers
On 05/17/2016 01:36 AM, Yang Shi wrote:
> In the current implementation of ARM64 eBPF JIT, R23 and R24 are used for
> tmp registers, which are callee-saved registers. This leads to variable size
> of JIT prologue and epilogue. The latest blinding constant change prefers to
> constant size of prologue and epilogue. AAPCS reserves R9 ~ R15 for temp
> registers which not need to be saved/restored during function call. So, replace
> R23 and R24 to R10 and R11, and remove tmp_used flag to save 2 instructions for
> some jited BPF program.
>
> CC: Daniel Borkmann <daniel@...earbox.net>
> Acked-by: Zi Shen Lim <zlim.lnx@...il.com>
> Signed-off-by: Yang Shi <yang.shi@...aro.org>
LGTM, thanks!
Acked-by: Daniel Borkmann <daniel@...earbox.net>
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