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Message-Id: <1463560892-7209-8-git-send-email-gabriel.fernandez@linaro.org>
Date: Wed, 18 May 2016 10:41:28 +0200
From: Gabriel Fernandez <gabriel.fernandez@...aro.org>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@...il.com>,
Maxime Coquelin <maxime.coquelin@...com>,
Patrice Chotard <patrice.chotard@...com>,
Russell King <linux@...linux.org.uk>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Olivier Bideau <olivier.bideau@...com>,
Gabriel Fernandez <gabriel.fernandez@...aro.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Andrzej Hajda <a.hajda@...sung.com>,
Pankaj Dev <pankaj.dev@...com>,
Dinh Nguyen <dinguyen@...nsource.altera.com>,
Arnd Bergmann <arnd@...db.de>,
Thierry Reding <treding@...dia.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kernel@...inux.com,
linux-clk@...r.kernel.org, Lee Jones <lee.jones@...aro.org>,
Peter Griffin <peter.griffin@...aro.org>,
<arnaud.pouliquen@...com>, <benjamin.gaignard@...com>,
<vincent.abriou@...com>
Subject: [PATCH 07/11] ARM: DT: STiH407: Enable synchronous clock mode on clkgend2
This patch adds a compatibility string on clkgend2 to allow the clock
driver to handle the synchronous/asynchronous modes of STiH407
Signed-off-by: Olivier Bideau <olivier.bideau@...com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...aro.org>
---
arch/arm/boot/dts/stih407-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 76c6984..bdf3998 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -256,7 +256,7 @@
clk_s_d2_flexgen: clk-s-d2-flexgen {
#clock-cells = <1>;
- compatible = "st,flexgen";
+ compatible = "st,stih407-clkgend2", "st,flexgen";
clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
--
1.9.1
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