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Message-ID: <CABwW5nm9itJUrfP6yNEgQPDcPojKvsPbxv6tdoJ0DFPDY9XrSw@mail.gmail.com>
Date: Thu, 19 May 2016 12:03:10 +0200
From: Mathias Kresin <openwrt@...sin.me>
To: John Crispin <john@...ozen.org>
Cc: Alexander Stein <alexander.stein@...tec-electronic.com>,
Florian Fainelli <f.fainelli@...il.com>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
andrew@...n.ch, "Mehrtens, Hauke" <hauke.mehrtens@...el.com>
Subject: Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver
2016-05-19 9:03 GMT+02:00 John Crispin <john@...ozen.org>:
> On 19/05/2016 08:57, Alexander Stein wrote:
>> Thanks for the link, I wasn't aware of that patch. I like it in general, but
>> there are some things I'd like to get addressed first:
>> * vr9_gphy_of_reg_init() writes uncoditionally to led3h and led3l even on
>> PEf7071 which does not have this register at all
>
> we use this driver mainly on the 11g and 22f version. mathias recently
> added the led3 handling.
>
> @Mathias, can you have a look at this and fix it inside the lede tree ?
Well, I haven't added the led3 handling, I've only changed the initial
value (function) of led3.
Maybe it's cleaner to not use a default value for the led function and
completely rely on the device tree bindings. But by adjusting the
initial values, I had to change only the led function of one board in
the openwrt xrx200 subtarget instead of touching all dts files.
I know that the LTQ Datasheet for the PEF 7071 Version 1.5 mentions
the led3 control register albeit there is no pin for a forth led. So I
guess it's safe to write to the led3 register even for the PEF 7071.
Mathias
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