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Message-ID: <CAMuHMdVs9=8BGwmCBuYch2abJBnCLKoEx7i3EMghW3UUjXc7dA@mail.gmail.com>
Date: Fri, 20 May 2016 10:04:26 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Rich Felker <dalias@...c.org>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linux-sh list <linux-sh@...r.kernel.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Jason Cooper <jason@...edaemon.net>,
Kumar Gala <galak@...eaurora.org>,
Marc Zyngier <marc.zyngier@....com>,
Mark Rutland <mark.rutland@....com>,
Pawel Moll <pawel.moll@....com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH v2 03/12] of: add J-Core interrupt controller bindings
On Fri, May 20, 2016 at 4:53 AM, Rich Felker <dalias@...c.org> wrote:
> +Additional properties required for aic1:
> +
> +- reg : Memory region for configuration.
> +
> +- cpu-offset : For SMP, the offset to the per-cpu memory region for
> + configuration, to be scaled by the cpu number.
Does cpu-offset apply to aic1 only?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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