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Message-ID: <61133267-f903-b580-7737-b77610392cde@rock-chips.com>
Date: Fri, 20 May 2016 20:55:56 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Caesar Wang <wxt@...k-chips.com>, Heiko Stuebner <heiko@...ech.de>
Cc: shawn.lin@...k-chips.com, linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Olof Johansson <olof@...om.net>,
Kumar Gala <galak@...eaurora.org>,
linux-kernel@...r.kernel.org,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Will Deacon <will.deacon@....com>,
Matthias Brugger <mbrugger@...e.com>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Eduardo Valentin <edubezval@...il.com>
Subject: Re: [PATCH] arm64: dts: rockchip: fixes the gic400 2nd region size
for rk3368
在 2016/5/18 22:41, Caesar Wang 写道:
> The 2nd additional region is the GIC virtual cpu interface register
> base and size.
>
> As the gic400 of rk3368 says, the cpu interface register map as below
>
> :
>
> -0x0000 GICC_CTRL
> .
> .
> .
> -0x00fc GICC_IIDR
> -0x1000 GICC_IDR
>
> Obviously, the region size should be greater than 0x1000.
> So we should make sure to include the GICC_IDR since the kernel will access
> it in some cases.
>
yes, address range for GICC_* should be from 0x2000 to 0x3fff according
to gic400 memory map Table 3-1.
Reviewed-by: Shawn Lin <shawn.lin@...k-chips.com>
> Signed-off-by: Caesar Wang <wxt@...k-chips.com>
> Cc: Heiko Stuebner <heiko@...ech.de>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-rockchip@...ts.infradead.org
>
> ---
>
> arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index 8b4a7c9..080203e 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -670,7 +670,7 @@
> #address-cells = <0>;
>
> reg = <0x0 0xffb71000 0x0 0x1000>,
> - <0x0 0xffb72000 0x0 0x1000>,
> + <0x0 0xffb72000 0x0 0x2000>,
> <0x0 0xffb74000 0x0 0x2000>,
> <0x0 0xffb76000 0x0 0x2000>;
> interrupts = <GIC_PPI 9
>
--
Best Regards
Shawn Lin
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