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Message-ID: <20160520223456.GV21636@brightrain.aerifal.cx>
Date:	Fri, 20 May 2016 18:34:57 -0400
From:	Rich Felker <dalias@...c.org>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Linux-sh list <linux-sh@...r.kernel.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Jason Cooper <jason@...edaemon.net>,
	Kumar Gala <galak@...eaurora.org>,
	Marc Zyngier <marc.zyngier@....com>,
	Mark Rutland <mark.rutland@....com>,
	Pawel Moll <pawel.moll@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH v2 03/12] of: add J-Core interrupt controller bindings

On Fri, May 20, 2016 at 10:04:26AM +0200, Geert Uytterhoeven wrote:
> On Fri, May 20, 2016 at 4:53 AM, Rich Felker <dalias@...c.org> wrote:
> > +Additional properties required for aic1:
> > +
> > +- reg : Memory region for configuration.
> > +
> > +- cpu-offset : For SMP, the offset to the per-cpu memory region for
> > +  configuration, to be scaled by the cpu number.
> 
> Does cpu-offset apply to aic1 only?

The current kernel driver doesn't have any reason to _need_ cpu-offset
for aic2, but since there are registers there that a driver (even a
non-Linux one) may want to use, I think it makes sense that it should
be present in the bindings.

Rich

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