linux-kernel - Re: [PATCH v3 8/9] cpuidle/powernv: Add support for POWER ISA v3 idle states

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Message-ID: <20160524103751.GF12860@in.ibm.com>
Date:	Tue, 24 May 2016 16:07:51 +0530
From:	Gautham R Shenoy <ego@...ux.vnet.ibm.com>
To:	"Shreyas B. Prabhu" <shreyas@...ux.vnet.ibm.com>
Cc:	mpe@...erman.id.au, linuxppc-dev@...ts.ozlabs.org,
	paulus@...abs.org, linux-kernel@...r.kernel.org, mikey@...ling.org,
	ego@...ux.vnet.ibm.com,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	linux-pm@...r.kernel.org
Subject: Re: [PATCH v3 8/9] cpuidle/powernv: Add support for POWER ISA v3
 idle states

On Mon, May 23, 2016 at 08:48:41PM +0530, Shreyas B. Prabhu wrote:
> POWER ISA v3 defines a new idle processor core mechanism. In summary,
>  a) new instruction named stop is added.
>  b) new per thread SPR named PSSCR is added which controls the behavior
> 	of stop instruction.
> 
> Supported idle states and value to be written to PSSCR register to enter
> any idle state is exposed via ibm,cpu-idle-state-names and
> ibm,cpu-idle-state-psscr respectively. To enter an idle state,
> platform provided power_stop() needs to be invoked with the appropriate
> PSSCR value.
> 
> This patch adds support for this new mechanism in cpuidle powernv driver.
> 
> Cc: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
> Cc: linux-pm@...r.kernel.org
> Cc: Michael Ellerman <mpe@...erman.id.au>
> Cc: Paul Mackerras <paulus@...abs.org>
> Cc: linuxppc-dev@...ts.ozlabs.org
> Signed-off-by: Shreyas B. Prabhu <shreyas@...ux.vnet.ibm.com>

Reviewed-by: Gautham R. Shenoy <ego@...ux.vnet.ibm.com>

--
Thanks and Regards
gautham.