linux-kernel - [PATCH v5 2/6] clocksource/drivers/arm_arch

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Message-Id: <1464096633-9309-3-git-send-email-fu.wei@linaro.org>
Date:	Tue, 24 May 2016 21:30:29 +0800
From:	fu.wei@...aro.org
To:	rjw@...ysocki.net, lenb@...nel.org, daniel.lezcano@...aro.org,
	tglx@...utronix.de, marc.zyngier@....com, hanjun.guo@...aro.org
Cc:	linux-arm-kernel@...ts.infradead.org, linaro-acpi@...ts.linaro.org,
	linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
	rruigrok@...eaurora.org, harba@...eaurora.org, cov@...eaurora.org,
	timur@...eaurora.org, graeme.gregory@...aro.org,
	al.stone@...aro.org, jcm@...hat.com, wei@...hat.com, arnd@...db.de,
	wim@...ana.be, catalin.marinas@....com, will.deacon@....com,
	Suravee.Suthikulpanit@....com, leo.duran@....com,
	Fu Wei <fu.wei@...aro.org>
Subject: [PATCH v5 2/6] clocksource/drivers/arm_arch_timer: Add a new enum for spi type

From: Fu Wei <fu.wei@...aro.org>

This patch add a new enum "spi_nr" and use it in the driver.
Just for code's readability, no functional change.

Signed-off-by: Fu Wei <fu.wei@...aro.org>
---
 drivers/clocksource/arm_arch_timer.c | 4 ++--
 include/clocksource/arm_arch_timer.h | 6 ++++++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 5d7272e..966c574 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -826,9 +826,9 @@ static void __init arch_timer_mem_init(struct device_node *np)
 	}
 
 	if (arch_timer_mem_use_virtual)
-		irq = irq_of_parse_and_map(best_frame, 1);
+		irq = irq_of_parse_and_map(best_frame, VIRT_SPI);
 	else
-		irq = irq_of_parse_and_map(best_frame, 0);
+		irq = irq_of_parse_and_map(best_frame, PHYS_SPI);
 
 	if (!irq) {
 		pr_err("arch_timer: Frame missing %s irq",
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index 6f06481..16dcd10 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -45,6 +45,12 @@ enum ppi_nr {
 	MAX_TIMER_PPI
 };
 
+enum spi_nr {
+	PHYS_SPI,
+	VIRT_SPI,
+	MAX_TIMER_SPI
+};
+
 #define ARCH_TIMER_PHYS_ACCESS		0
 #define ARCH_TIMER_VIRT_ACCESS		1
 #define ARCH_TIMER_MEM_PHYS_ACCESS	2
-- 
2.5.5