linux-kernel - [PATCH] KVM: Handle MSR_IA32_PERF

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Message-Id: <770161464247923@webcorp02g.yandex-team.ru>
Date:	Thu, 26 May 2016 10:32:03 +0300
From:	kmeaw@...dex-team.ru
To:	linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc:	gleb@...nel.org, pbonzini@...hat.com
Subject: [PATCH] KVM: Handle MSR_IA32_PERF_CTL

From: Dmitry Bilunov <kmeaw@...dex-team.ru>

Intel CPUs having Turbo Boost feature implement an MSR to provide a
control interface via rdmsr/wrmsr instructions. One could detect the
presence of this feature by issuing one of these instructions and
handling the #GP exception which is generated in case the referenced MSR
is not implemented by the CPU.

KVM's vCPU model behaves exactly as a real CPU in this case by injecting
a fault when MSR_IA32_PERF_CTL is called (which KVM does not support).
However, some operating systems use this register during an early boot
stage in which their kernel is not capable of handling #GP correctly,
causing #DP and finally a triple fault effectively resetting the vCPU.

This patch implements a dummy handler for MSR_IA32_PERF_CTL to avoid the
crashes. Most notably it fixes an issue with MacOS X 10.10 kernel.

Signed-off-by: Dmitry Bilunov <kmeaw@...dex-team.ru>
---
 arch/x86/kvm/x86.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c805cf4..9f38c7f 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -983,6 +983,7 @@ static u32 emulated_msrs[] = {
        MSR_IA32_MCG_STATUS,
        MSR_IA32_MCG_CTL,
        MSR_IA32_SMBASE,
+       MSR_IA32_PERF_CTL,
 };

 static unsigned num_emulated_msrs;
@@ -2050,6 +2051,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
        case MSR_VM_HSAVE_PA:
        case MSR_AMD64_PATCH_LOADER:
        case MSR_AMD64_BU_CFG2:
+       case MSR_IA32_PERF_CTL:
                break;

        case MSR_EFER:
@@ -2314,6 +2316,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
        case MSR_AMD64_NB_CFG:
        case MSR_FAM10H_MMIO_CONF_BASE:
        case MSR_AMD64_BU_CFG2:
+       case MSR_IA32_PERF_CTL:
                msr_info->data = 0;
                break;
        case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
-- 
2.8.2