linux-kernel - RE: fsl-dcu not works on latest "drm-next"

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Message-ID: <HE1PR04MB1051A456377DB6BB3531B925EC410@HE1PR04MB1051.eurprd04.prod.outlook.com>
Date:	Thu, 26 May 2016 08:23:42 +0000
From:	Meng Yi <meng.yi@....com>
To:	Mark Brown <broonie@...nel.org>
CC:	"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"David Airlie" <airlied@...ux.ie>, Stefan Agner <stefan@...er.ch>,
	"airlied@...hat.com" <airlied@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: fsl-dcu not works on latest "drm-next"

Hi Mark,

> You've not specifically described the problem here - what are the endiannesses
> of both the CPU and the device you're talking to?  What specifically is the
> endianess problem you are seeing, what are you seeing and what do you
> expect to see?
> 

The CPU is little endian and the device DCU is big endian, specified big-endian in DTS, 
        
And here is my DTS and regmap_config,

Specified "big-endian" in DTS,

        dcu: dcu@...0000 {
            compatible = "fsl,ls1021a-dcu";
            reg = <0x0 0x2ce0000 0x0 0x10000>;
            interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&platform_clk 0>;
            clock-names = "dcu";
            big-endian;
            status = "disabled";
        };

I can't tell the difference of "reg_format_endian" and " val_format_endian ", so I had tried four conditions. And all failed.

static const struct regmap_config fsl_dcu_regmap_config = {
    .reg_bits = 32,
    .reg_stride = 4,
    .val_bits = 32,
    .cache_type = REGCACHE_RBTREE,
//  .reg_format_endian = REGMAP_ENDIAN_BIG, //  .val_format_endian = REGMAP_ENDIAN_BIG,

    .volatile_reg = fsl_dcu_drm_is_volatile_reg, };


I expect that regmap write as big endian, and I am seeing is regmap write as little endian.

Thanks,
Best Regards,
Meng Yi