lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 26 May 2016 13:59:11 +0300
From:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:	Weifeng Voon <weifeng.voon@...el.com>,
	Wolfram Sang <wsa@...-dreams.de>,
	Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Cc:	linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
	jui.nee.tan@...el.com
Subject: Re: [PATCH 0/5] i2c: designware: Enable fast mode plus and high
 speed

On Thu, 2016-05-26 at 16:01 +0800, Weifeng Voon wrote:
> Enabled fast mode plus and high speed which supported by APL SoC.
> 

FWIW:
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

> Weifeng Voon (5):
>   i2c: designware: Move clk_freq into struct dw_i2c_dev
>   i2c: designware: get fast plus and high speed *CNT configuration
>   i2c: designware: Enable fast mode plus
>   i2c: designware: set the common config before the if else
>   i2c: designware: Enable high speed mode
> 
>  drivers/i2c/busses/i2c-designware-core.c    | 33
> +++++++++++++++++++++---
>  drivers/i2c/busses/i2c-designware-core.h    | 12 +++++++++
>  drivers/i2c/busses/i2c-designware-platdrv.c | 39 +++++++++++++++++++-
> ---------
>  3 files changed, 68 insertions(+), 16 deletions(-)
> 

-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ