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Message-ID: <20160526164456.GE7456@e104818-lin.cambridge.arm.com>
Date: Thu, 26 May 2016 17:44:57 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Russell King - ARM Linux <linux@...linux.org.uk>
Cc: Mark Rutland <mark.rutland@....com>,
Hanjun Guo <guohanjun@...wei.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
"Leizhen (ThunderTown)" <thunder.leizhen@...wei.com>,
Will Deacon <will.deacon@....com>,
linux-kernel <linux-kernel@...r.kernel.org>,
Xinwei Hu <huxinwei@...wei.com>, Zefan Li <lizefan@...wei.com>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Tianhong Ding <dingtianhong@...wei.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/1] arm64: fix flush_cache_range
On Wed, May 25, 2016 at 06:27:07PM +0100, Russell King - ARM Linux wrote:
> On Wed, May 25, 2016 at 04:22:55PM +0100, Catalin Marinas wrote:
> > That's when we realised that the CoW problem no longer exists for
> > non-aliasing VIPT caches. However, the I-cache counterpart 6060e8df5178
> > has not been reverted.
>
> I think I mostly agree, except for reverting 6060e8df5178, which I don't
> think would be correct. That reintroduces the possibility of flushing
> the I-cache twice in that path, once for aliasing vipt dcaches, and again
> for asid tagged vivt icaches. I'd rather have the code structured so we
> only do this once.
__sync_icache_dcache() seems to take care of AIVIVT caches as well (i.e.
it invalidates the whole I-cache) so I think we could just remove the
__flush_icache_all() from flush_cache_range().
I can't find a scenario where we still need D-cache clean+invalidate in
flush_cache_range() for aliasing VIPT. As for the I-cache,
__sync_icache_dcache() takes care of all the aliases.
--
Catalin
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