[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1464429273-23457-5-git-send-email-krzk@kernel.org>
Date: Sat, 28 May 2016 11:54:15 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Cc: Javier Martinez Canillas <javier@....samsung.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>
Subject: [PATCH v5 04/22] ARM: dts: exynos: Re-order alphabetically Exynos5420 SD0/SD1 pinctrl nodes
The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion.
Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
Reviewed-by: Javier Martinez Canillas <javier@....samsung.com>
Tested-by: Javier Martinez Canillas <javier@....samsung.com>
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 130563b2ca95..14beb7e07323 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -193,17 +193,17 @@
samsung,pin-drv = <3>;
};
- sd1_clk: sd1-clk {
- samsung,pins = "gpc1-0";
+ sd0_rclk: sd0-rclk {
+ samsung,pins = "gpc0-7";
samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
+ samsung,pin-pud = <1>;
samsung,pin-drv = <3>;
};
- sd0_rclk: sd0-rclk {
- samsung,pins = "gpc0-7";
+ sd1_clk: sd1-clk {
+ samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
- samsung,pin-pud = <1>;
+ samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
--
2.7.4
Powered by blists - more mailing lists