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Message-ID: <CC22646CC0522A488A20F7A66BFD619308D47B@irsmsx105.ger.corp.intel.com>
Date:	Mon, 30 May 2016 07:55:55 +0000
From:	"Baranowska, BeataX" <beatax.baranowska@...el.com>
To:	"Hunter, Adrian" <adrian.hunter@...el.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:	"Dong, Chuanxiao" <chuanxiao.dong@...el.com>,
	"Jarosz, SebastianX" <sebastianx.jarosz@...el.com>
Subject: [PATCH] mmc: sdhci: use udelay instead of mdelay

From: Chuanxiao Dong <chuanxiao.dong@...el.com>

This patch will use udelay instead of mdelay when waiting for
SDHCI hardware to be stable. udelay can help to reduce the waiting
time when is in critical region which is protected by spinlock.

With this patch, __sdhci_set_ios only take a few microseconds to be
done.

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@...el.com>
---
drivers/mmc/host/sdhci.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index e010ea4eb6f5..56d2c7567d97 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -173,8 +173,8 @@ void sdhci_reset(struct sdhci_host *host, u8 mask)
                        sdhci_runtime_pm_bus_off(host);
        }

-       /* Wait max 100 ms */
-       timeout = 100;
+       /* Wait max 10000 ms */
+       timeout = 10000;

        /* hw clears the bit when it's done */
        while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
@@ -185,7 +185,7 @@ void sdhci_reset(struct sdhci_host *host, u8 mask)
                        return;
                }
                timeout--;
-               mdelay(1);
+               udelay(10);
        }
 }
 EXPORT_SYMBOL_GPL(sdhci_reset);
@@ -985,8 +985,8 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
        /* Initially, a command has no error */
        cmd->error = 0;

-       /* Wait max 10 ms */
-       timeout = 10;
+       /* Wait max 1000 ms */
+       timeout = 1000;

        mask = SDHCI_CMD_INHIBIT;
        if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
@@ -1007,7 +1007,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
                        return;
                }
                timeout--;
-               mdelay(1);
+               udelay(10);
        }

        timeout = jiffies;
@@ -1240,8 +1240,8 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
        clk |= SDHCI_CLOCK_INT_EN;
        sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

-       /* Wait max 20 ms */
-       timeout = 20;
+       /* Wait max 2000 ms */
+       timeout = 2000;
        while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
                & SDHCI_CLOCK_INT_STABLE)) {
                if (timeout == 0) {
@@ -1251,7 +1251,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                        return;
                }
                timeout--;
-               mdelay(1);
+               udelay(10);
        }

        clk |= SDHCI_CLOCK_CARD_EN;
--


Regards,
Beata Baranowska

Intel Technology Poland sp. z o.o.
ul. Słowackiego 173 | 80-298 Gdańsk 
Sąd Rejonowy Gdańsk Północ 
VII Wydział Gospodarczy Krajowego Rejestru Sądowego - KRS 101882 
NIP 957-07-52-316 | Kapitał zakładowy 200.000 PLN

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