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Message-ID: <CACRpkdaDReMSb6uBi2ono_m-fnMoh9-p=Wj=XB5nF72FEmXmyA@mail.gmail.com>
Date: Tue, 31 May 2016 12:46:46 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Masahiro Yamada <yamada.masahiro@...ionext.com>
Cc: "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control
On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada
<yamada.masahiro@...ionext.com> wrote:
> The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
> strength control. Drive strength of some pins are controlled by
> 3-bit width registers (8-level granularity).
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
Patch applied.
Yours,
Linus Walleij
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