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Date:	Tue, 31 May 2016 12:51:39 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Masahiro Yamada <yamada.masahiro@...ionext.com>
Cc:	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 12/17] pinctrl: uniphier: support pin configuration for
 dedicated pins

On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada
<yamada.masahiro@...ionext.com> wrote:

> PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
> (pin biasing, drive strength control), but not pin-muxing.
>
> Allow to fill the mux value table with -1 for those pins; pins with
> mux value -1 will be skipped in the pin-mux set function.  The mux
> value type should be changed from "unsigned" to "int" in order to
> accommodate -1 as a special case.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>

Patch applied.

Yours,
Linus Walleij

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