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Message-ID: <20160531131630.GB30721@potion>
Date: Tue, 31 May 2016 15:16:31 +0200
From: Radim Krčmář <rkrcmar@...hat.com>
To: kmeaw@...dex-team.ru
Cc: Paolo Bonzini <pbonzini@...hat.com>,
"Gabriel L. Somlo" <gsomlo@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"gleb@...nel.org" <gleb@...nel.org>
Subject: Re: [PATCH v3] KVM: Handle MSR_IA32_PERF_CTL
2016-05-31 13:06+0300, kmeaw@...dex-team.ru:
> 31.05.2016, 11:21, "Paolo Bonzini" <pbonzini@...hat.com>:
> >> 2016-05-27 17:22+0200, Radim Krčmář:
> >> > (I wonder why MacOS X doesn't read IA32_PERF_STATUS, though.)
> >>
> >> Oh, it maybe does ... we already emulate status and return 0x1000 in its
> >> bottom 16 bits. I have no idea what is that supposed to mean, but I
> >> think we should return 0x1000 in IA32_PERF_CTL then.
> >
> > It's 1000, not 0x1000 (instead, on real hardware the value is typically a
> > multiple of 256). It was added for Darwin too.
> >
> > Returning different values is okay, because they are different on real
> > hardware too:
> >
> > (sudo dd if=/dev/cpu/0/msr skip=$((0x198)) iflag=skip_bytes bs=8 count=1;
> > sudo dd if=/dev/cpu/0/msr skip=$((0x199)) iflag=skip_bytes bs=8 count=1) | od -tx8
> > 0000000 00001f3900001100 0000000000001300
> > ^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^
> > PERF_STATUS PERF_CTL
> >
> > And perhaps if we returned non-zero values for PERF_CTL Darwin would try to
> > write to it. So returning zero is fine, I think. There is no correct answer...
>
> Thank you. I have removed MSR_IA32_PERF_CTL from emulated_msrs[]. Returning
> 1000 (0x3e8) for PERF_STATUS and 0 for PERF_CTL works fine with MacOS X.
>
> Just in case here are MSRs from i5-4460:
> PERF_STATUS: 0000202800002100
> PERF_CTL: 0000000000002200
>
> Chaning KVM's PERL_CTL from 0 to 0x2200 does not seem to interfere with MacOS X
> boot process. It does not attempt to wrmsr into this register.
>
> Here is a refined version of the patch:
> --
>
> From: Dmitry Bilunov <kmeaw@...dex-team.ru>
>
> Intel CPUs having Turbo Boost feature implement an MSR to provide a
> control interface via rdmsr/wrmsr instructions. One could detect the
> presence of this feature by issuing one of these instructions and
> handling the #GP exception which is generated in case the referenced MSR
> is not implemented by the CPU.
>
> KVM's vCPU model behaves exactly as a real CPU in this case by injecting
> a fault when MSR_IA32_PERF_CTL is called (which KVM does not support).
> However, some operating systems use this register during an early boot
> stage in which their kernel is not capable of handling #GP correctly,
> causing #DP and finally a triple fault effectively resetting the vCPU.
>
> This patch implements a dummy handler for MSR_IA32_PERF_CTL to avoid the
> crashes.
> ---
The code looks good. Please resend with your signed-off-by and
preserved writespace (tabs were converted to spaces),
thanks.
> arch/x86/kvm/x86.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index c805cf4..d0a5b4b 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2314,6 +2314,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> case MSR_AMD64_NB_CFG:
> case MSR_FAM10H_MMIO_CONF_BASE:
> case MSR_AMD64_BU_CFG2:
> + case MSR_IA32_PERF_CTL:
> msr_info->data = 0;
> break;
> case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
> --
> 2.8.2
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