[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <575011FD.4070109@linux.vnet.ibm.com>
Date: Thu, 02 Jun 2016 19:01:17 +0800
From: xinhui <xinhui.pan@...ux.vnet.ibm.com>
To: Arnd Bergmann <arnd@...db.de>
CC: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
waiman.long@...com, peterz@...radead.org
Subject: Re: [PATCH] locking/qrwlock: fix write unlock issue in big endian
On 2016年06月02日 18:44, Arnd Bergmann wrote:
> On Thursday, June 2, 2016 6:09:08 PM CEST Pan Xinhui wrote:
>> diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
>> index 54a8e65..eadd7a3 100644
>> --- a/include/asm-generic/qrwlock.h
>> +++ b/include/asm-generic/qrwlock.h
>> @@ -139,7 +139,7 @@ static inline void queued_read_unlock(struct qrwlock *lock)
>> */
>> static inline void queued_write_unlock(struct qrwlock *lock)
>> {
>> - smp_store_release((u8 *)&lock->cnts, 0);
>> + (void)atomic_sub_return_release(_QW_LOCKED, &lock->cnts);
>> }
>
> Isn't this more expensive than the existing version?
>
yes, a little more expensive than the existing version
But does this is generic code, I am not sure how it will impact the performance on other archs.
If you like
we calculate the correct address to set to NULL
say,
static inline void queued_write_unlock(struct qrwlock *lock)
{
u8 *wl = lock;
#ifdef __BIG_ENDIAN
wl += 3;
#endif
smp_store_release(wl, 0);
}
> Arnd
>
Powered by blists - more mailing lists