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Message-ID: <575027E9.3070202@ti.com>
Date:	Thu, 2 Jun 2016 07:34:49 -0500
From:	Nishanth Menon <nm@...com>
To:	Santosh Shilimkar <santosh.shilimkar@...cle.com>,
	Arnd Bergmann <arnd@...db.de>,
	<linux-arm-kernel@...ts.infradead.org>
CC:	Russell King <linux@...linux.org.uk>,
	Santosh Shilimkar <ssantosh@...nel.org>,
	Grygorii Strashko <grygorii.strashko@...com>,
	Lokesh Vutla <lokeshvutla@...com>,
	<linux-kernel@...r.kernel.org>, Tero Kristo <t-kristo@...com>,
	Murali Karicheri <m-karicheri2@...com>,
	Bill Mills <wmills@...com>
Subject: Re: [PATCH] ARM: Keystone: Introduce Kconfig option to compile in
 typical Keystone features

On 06/01/2016 06:26 PM, Santosh Shilimkar wrote:
[...]
>>> Side note on LPAE:
>>> For our current device tree and u-boot, LPAE is mandatory to bootup
>>> for current Keystone boards - but this is not a SoC requirement,
>>> booting without LPAE/HIGHMEM results in non-coherent DDR accesses.
>>
>> This sounds like a regression, I thought we had this working when
>> keystone was initially merged and we got both the coherent and
>> non-coherent mode working with the same DT.
>>
> Yes and it works. The coherent memory space itself is beyond 4GB so

Hmm... True, I just tested next-20160602 with mem_lpae set to 0 in
u-boot and it seems to boot just fine.

> I don't understand a requirement of having coherent memory without
> LPAE.

Looks like a messed up description on my end, Looks like I have to
update my automated test framework to incorporate the manual steps
involved.


-- 
Regards,
Nishanth Menon

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